A real-time system is a computing system in which the correctness of the system depends not only on the logical result of computation but also on the time at which the results are produced. Hard real-time systems require that deadlines are always met; failure to do so results in system failure (e.g., aircraft fly-by-wire, airbag controllers). Soft real-time systems tolerate occasional deadline misses with degraded performance but no catastrophic failure (e.g., video streaming, interactive games). Real-time systems rely on real-time operating systems (RTOS) that provide deterministic scheduling and interrupt handling.
Total CPU Utilization U = sum(C_i / T_i) ≤ n × (2^(1/n) − 1)
LaTeX: U = \sum_{i=1}^{n} \frac{C_i}{T_i} \leq n(2^{1/n}-1)
| Symbol | Meaning | Unit |
|---|---|---|
| U | Total CPU utilization | dimensionless (0 to 1) |
| C_i | Worst-case execution time of task i | ms or s |
| T_i | Period (deadline) of task i | ms or s |
| n | Number of periodic tasks | dimensionless |
Problem
A hard real-time task must execute every 10 ms (period T = 10 ms) and takes 3 ms to complete (execution time C = 3 ms). Calculate the CPU utilization for this task and determine whether it meets the Rate-Monotonic utilization bound for a single task.
Solution
Step 1 — Calculate utilization: U = C / T = 3 ms / 10 ms = 0.30 (30%). Step 2 — Rate-Monotonic (RM) schedulability bound for n = 1 task: U_bound = n × (2^(1/n) − 1) = 1 × (2^1 − 1) = 1.0 (100%). Step 3 — Compare: U = 0.30 ≤ U_bound = 1.0, so the task is schedulable under RM scheduling.
Answer
CPU utilization = 30%; the task is schedulable (U = 0.30 ≤ 1.0).
| Classification | Deadline Miss Effect | Example | Typical RTOS |
|---|---|---|---|
| Hard Real-Time | Catastrophic failure | ABS brake controller | VxWorks, FreeRTOS |
| Firm Real-Time | Result discarded, no failure | ATM transaction processing | QNX, LynxOS |
| Soft Real-Time | Degraded quality | Video conferencing | Linux (PREEMPT_RT) |
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An embedded system is a dedicated computer system designed to perform one or a few specific functions within a larger mechanical or electronic device, operating under real-time computing constraints. Embedded systems combine a microcontroller or microprocessor with custom software (firmware) and interface directly with hardware peripherals such as sensors, actuators, and displays. They are ubiquitous in modern life, found in smartphones, automotive ECUs, washing machines, medical pacemakers, and industrial PLCs.
A computer interrupt is a signal sent to the processor indicating that an event requiring immediate attention has occurred, causing the CPU to pause its current execution, save its state, and transfer control to an interrupt service routine (ISR). Interrupts can originate from hardware (e.g., a keypress, network packet arrival, timer expiry) or software (e.g., system calls, exceptions). The interrupt mechanism is fundamental to efficient multitasking and real-time responsiveness, as it allows the CPU to react to asynchronous events without continuously polling devices.
A Field-Programmable Gate Array (FPGA) is an integrated circuit containing an array of configurable logic blocks (CLBs), programmable interconnects, and I/O elements that can be reconfigured after manufacturing to implement virtually any digital circuit. Unlike fixed-function ASICs, FPGAs are reprogrammable using hardware description languages such as VHDL or Verilog, enabling rapid prototyping and field updates. FPGAs are widely used in signal processing, telecommunications, hardware acceleration, aerospace, and as prototyping platforms for ASIC designs.
From Latin "realis" (actual, relating to things) and Old French "tems" (time, from Latin "tempus"). The formal concept was developed in the 1960s and rigorously defined by researchers such as John Liu and Chung Laung Liu in their seminal 1973 paper "Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment."